1. Field of the Invention
This invention relates to the field of integrated circuits. More particularly, this invention relates to the communication of diagnostic signals to or from an integrated circuit.
2. Description of the Prior Art
It is known to provide integrated circuits with on-chip diagnostic capabilities. These capabilities can include debug, trace, calibration, configuration, production test and/or in-circuit programming. As integrated circuits increase in complexity, such as with the advent of system-on-chip designs, the provision of on-chip diagnostic mechanisms becomes increasingly useful and important.
A known technique for communicating diagnostic signals to and from an integrated circuit is to provide dedicated debug pins upon the integrated circuit package through which the diagnostic signals may pass. One example of such an arrangement would be the Test Access Port pins associated with JTAG debug.
An increasingly problem arising with integrated circuits are the limitations imposed by the integrated circuit packaging upon the number of pins provided. As the integrated circuits within the package increase in complexity, there is normally an increase in the required number of pins to communicate signals to and from the integrated circuit during normal functional operation. However, it is difficult to increase the number of pins provided by the package if space is limited and there is also a tendency to reduce the overall package size for cost or other reasons.
A characteristic of the diagnostic signals required for use in combination with an integrated circuit is that they typically are only used for a small proportion of devices or a small proportion of the life of a device. For example, debug capabilities may in practice normally only be used in debugging a few prototype devices and thereafter the production devices will not use the debug capabilities provided on-chip. Another example is integrated circuit calibration, configuration or in-circuit programming which would normally takes place upon manufacture and does not form part of the ongoing functional use of the integrated circuit by a user. The present technique recognises that valuable resources namely integrated circuit pins, are being dedicated to diagnostic uses when these uses are often one-time uses or never performed on a particular integrated circuit.